Multi-rate PHY/Framer, Pointer Processor, Cross Connect, and PDH Mapper (TXC-07905)


The "Optimized Edge Device" OED622™ is a cost-effective, highly integrated overhead termination device for SDH and PDH applications, which terminates two STM-4 or STM-1 lines. Clock synthesis and clock recovery for SDH lines are built into the device. The device provides complete regenerator section and multiplexer section plus path overhead processing and termination. In addition, high-order and low-order (VC-12) pointer tracking and retiming is also performed, coupled with a 1134 x 1134 strictly non-blocking VC-12 cross connect. The device integrates 21 E1 channels that are SNCP protected with SDH performance monitoring. Additional tributary traffic can be supported using two independent add/drop telecom buses that can directly interface to PDH/EoS mappers. The OED622™ is designed to work in a stand-alone mode for cost-effective ADMs that require E1 channel mapping. The two STM-4/1 line interfaces provide support for ring closure and MSP protection as well. On the terminal side, the two add/drop telecom buses enable enhanced multi-service application support, such as that offered by the TranSwitch EtherMap® and PDH mapper families.


  • Dual bit-serial LVPECL SDH line interfaces with integrated clock recovery and synthesis (Dual 622.08 Mbit/s STM-4 signals or Dual 155.52 Mbit/s STM-1 signals)
  • Complete Regenerator Section and Multiplexer Section overhead processing
  • Complete high order path overhead processing and termination at VC-4/VC-4 SPE level
  • 16-bit wide Motorola microprocessor interface
  • SOH access port, including extraction and insertion of DCC (MS and RS) bytes
  • Re-time of all tributaries based on single reference for any high or low order tributaries from both line interfaces
  • Dual byte-wide 77.76 or 19.44 MHz Telecom Bus terminal interfaces for interfacing with TranSwitch’s portfolio of SDH Ethernet-over-SDH, Mapper and Framer devices
  • Integrated non-blocking cross-connect for 18 x 18 VC-4 high and low order tributaries
  • Optional pass-through transparency for path overhead bytes
  • Integrated E1 mapper for up to 21 E1 asynchronous channels, including 1+1 path (SNCP) protection
  • Boundary scan and line loopback
  • Industrial temperature range (-40oC to +85oC)
  • 421-lead thermally enhanced ball grid array (TEBGA) 31 mm x 31 mm package


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