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Senior ASIC Verification Engineer
Job Number: IAD101-N137
For immediate consideration, email your resume to [email protected].


As a part of a team developing highly integrated leading edge communication chips, you will participate and be responsible for:

  • Defining simulation and verification strategy;
  • Developing the verification environment, and the various agents and transactors for verification;
  • Developing tests to verify the design;
  • Be involved in debugging the design through all phases


  • Knowledge of Verilog and scripting languages like Perl.
  • Prior work developing behavioral models and simulation agents for large ASICs and experience working on ASICs with embedded processors.
  • Experience with communication ICs is a plus as is the knowledge of chip level testing.
  • 3 - 5 years of relevant experience


  • MSEE is preferred.


  • Experience with Large-scale integration projects.

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