Senior ASIC Design Engineer
Job Number: 2082
For immediate consideration, email your resume to [email protected].
Resumes accepted from Principals only.


We are looking for a senior/staff ASIC design engineer with at least 5 years experience in
VLSI design, and an MS degree in Electrical/computer engineering.


  • Should be proficient in Verilog RTL design
  • Should be proficient in Synopsys logic Synthesis
  • Strong background in Verilog simulations, block level as well as Chip/system level
  • Strong background in Static timing analysis - pre and post layout
  • High-speed digital design experience
  • Experience in deep sub-micron technologies
  • Must have completed successful chip designs

The successful candidate will participate in ASIC - chip definition, specification, verilog coding, synthesis, functional verification, timing verification and interface with layout and test/product engineering.


  • MSEE with 5-10 years experience

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