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Staff Physical Design Engineer
Job Number: 2066
For immediate consideration, email your resume to [email protected].

LOCATION: Fremont, CA

POSITION SUMMARY:

Will work on projects from gate-level netlist through P&R; and tapeout. Will perform physical design implementation including floorplanning, Place & Route, ECO's, and Verification. Execute Hierarchical Timing Driven Place & Route flow at block and top level for key ASIC design projects. Will also develop Scripts for Layout Automation.

REQUIRED QUALIFICATIONS:

• Experience in clock tree synthesis, Placement Based Optimization as part of timing driven P&R; as well as knowledge of floorplanning and layout methodology.
  
• High speed, deep submicron design and implementation experience
  
• Proven experience in large tapeouts (1 million gate)
  
• Working with Logic Design Team on synthesis / scan issues
  
• C, Skill, and Script experience are necessary.
  
• While knowledge of Dracula is expected, knowledge of Vampire or Hercules is a plus.
  
• Hands-on experience in Cadence Place & Route tools.
• Proven leadership experience

EDUCATION REQUIREMENTS:

• BSEE with 9 years experience or MSEE with 7 years experience in physical design implementation and tapeouts.